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Efficient metallic carbon nanotube removal for highly-scaled technologies. Carbon nanotube circuit integration up to sub-20 nm channel lengths. IEEE International Electron Devices Meeting (IEDM) 1–4 (IEEE, 2009) VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using carbon nanotube FETs. Scalable carbon nanotube computational and storage circuits immune to metallic and mispositioned carbon nanotubes. In IEEE International Electron Devices Meeting (IEDM) 33–36 (IEEE, 2014) High-performance carbon nanotube field-effect transistors. In Symposium on VLSI Technology 205–206 (IEEE, 2008) Integrated wafer-scale growth and transfer of directional carbon nanotubes and misaligned-carbon-nanotube-immune logic structures. Linear increases in carbon nanotube density through multiple transfer technique. Nanotube molecular wires as chemical sensors. Single-walled carbon nanotube–metalloporphyrin chemiresistive gas sensor arrays for volatile organic compounds. Electron Devices Meeting (IEDM) 7–13 (IEEE, 2011) Advances, challenges and opportunities in 3D CMOS sequential integration. 3D monolithic integration: technological challenges and electrical results. In International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) 76–78 (IEEE, 2008) Enabling technologies for 3D chip stacking. In IEEE International Electron Devices Meeting (IEDM) 27–34 (IEEE, 2014) Monolithic 3D integration of logic and memory: carbon nanotube FETs, resistive RAM, and silicon FETs. International Conference for High Performance Computing, Networking, Storage and Analysis (SC14) 830–841 (IEEE, 2014) Scaling the power wall: a path to exascale. In ACM SIGARCH Computer Architecture News Vol. Scaling the bandwidth wall: challenges in and avenues for CMP scaling.
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Big Data: A Revolution That Will Transform How We Live, Work, and Think (Houghton Mifflin Harcourt, 2013) Sensor-to-digital interface built entirely with carbon nanotube FETs. Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates. Device scaling limits of Si MOSFETs and their application dependencies. Design of ion-implanted MOSFET’s with very small physical dimensions. Energy-efficient abundant-data computing: the N3XT 1,000x.
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Memory leads the way to better computing. In IEEE Internation Electron Devices Meeting (IEDM) 1–4 (IEEE, 2009) A non-iterative compact model for carbon nanotube FETs incorporating source exhaustion effects. In IEEE International Electron Devices Meeting (IEDM) (2012)įranklin, A. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems 5.Ĭhang, L. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. As a working prototype, our nanosystem senses and classifies ambient gases. As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce ‘highly processed’ information. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors-promising new nanotechnologies for use in energy-efficient digital logic circuits 1, 2, 3 and for dense data storage 4-fabricated on vertically stacked layers in a single chip. Here we present a prototype of such a transformative nanosystem. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone.